In the formation of electronic devices it is necessary to electrically couple input/output (I/O) bond pads on each integrated circuit semiconductor chip to electrical leads on a substrate to which the chip is mounted. One method of attaching the I/O pads is wire bonding. In this process one end of a wire, typically of 1 mil diameter, is bonded to an I/O pad while the other end of the wire is bonded to the appropriate lead on the substrate. With wire bonding specific chip applications do not require new custom tooling. Soft tooling (software changes) enable users to apply wire bonding to each particular chip. This is true whether the chips are packaged in through hole mounted packages, surface mounted packages, or whether the chips are directly attached through wires to the substrate.
Another method of coupling the I/O pads with the substrate leads is TAB. In contrast with wire bonding, the use of TAB tape to attach the I/O pads of semiconductor chips to leads on a substrate has centered around the concept of requiring a custom TAB tape design for each chip application. This is required in order to match the TAB tape inner lead bonding to the size, bond pad pitch and bond pad pattern of the chip. The result is that TAB has been limited to high volume applications due to the excessive tooling costs ($100-200K) and long lead times (three months) for custom TAB tape designs.